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Task #3679
openPreliminary Design
Task #3679:
Preliminary Design
Status:
In Progress
Priority:
Normal
Assignee:
Target version:
Start date:
02/06/2026
Due date:
03/06/2026 (about 3 months late)
% Done:
50%
Estimated time:
Spent time:
Updated by Thomas Joseph 3 months ago
- Target version set to Zarro Integrated - mDAQ Lite
Updated by Thomas Joseph 2 months ago
- Status changed from New to In Progress
- % Done changed from 0 to 30
Updated by Thomas Joseph 2 months ago
- % Done changed from 30 to 50
Decided panel cmponents
designed protection circuit and Power rail
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