Task #2930
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Task #2928: Testing of PLCIO Stacked boards with CTB platform
Test PLCIO with CTB application
Added by Thomas Joseph 8 months ago. Updated 6 months ago.
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Updated by Thomas Joseph 8 months ago
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#1
- Subject changed from Test PLCIO with eVidya application to Test PLCIO with CTB application
Updated by
Updated by VenuMadhav S 8 months ago
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#5
Updated by
Updated by Thomas Joseph 8 months ago
· Edited
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#9
V1P0 Board Status
Many rework, not traceable
Tested with individual binary(with separate hardware changes) for AI, DI , DO - Working as expected. With common hardware, MISO amplitude got reduced
V1P1 assembled with host interface connector and isolator ( made config as #1 )
w/o any rework, AI, DI, DO got expected results
Observation in terminal log - In DO testing, MISO MSB was 0 in terminal log ( instead of expected 1), but DO output got correct
+In CTB, menu driven code is not functional. hence DO is tested by hardcoding the values and the generating the binary+
@Resmi K.V : Please put following in an excel sheet, upload in onedrive and give link in redmine.
Test setup, input , output (relevant details formatted and parsed ), observations, summary
upload unformatted logfile also in onedrive
Onedrive folder=> https://elpisit-my.sharepoint.com/:f:/g/personal/satish_sl_elpisitsolutions_com/IgArIylhefkfRZkUE5lGVwNcAREsLwpwwAUD7-wnyM3EtvQ?e=K4OwWb
Updated by Thomas Joseph 8 months ago
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#10
- Assignee changed from Sumanth D to Bhumika R
Updated by Thomas Joseph 8 months ago
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#11
Prakash on leave, assigned to Bhumika
Updated by Thomas Joseph 8 months ago
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#12
Moving to Yoganand as Bhumika is on leave
Updated by Thomas Joseph 8 months ago
· Edited
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#13
- Assignee changed from Bhumika R to Yoganand D
PLCIO#1 - Host controller interface - Tested AI-8Ch, DI-8Ch, DO-8Ch
Issue - Observation : Observation in terminal log - In DO testing, MISO MSB was 0 in terminal log ( instead of expected 1), but DO output got correct
Tested AI and DI with Binary-1, DO with Binary-2
PLCIO#2 - no Host Interface, no AI, need to stack on #1
Hardware is ready with Daisy chaining of DI and DO
What is the plan for stacked PLCIO (8AI, 16DI, 16DO(source)) ?
Test Setup for DO Sinking atleast 100mA (Relay + LED board buy from Robu)
Test Setup for 8AI, 16DI available
DO- Binary-3 (update of Binary-2)
16DI and 8AI - Binary-4 (update of Binary-1)
@Yoganand D : Update source and binary in proj. folder and update link here, (File naming format " mDAQ2-3_CTB_Datalogger_V3.4" )
Updated by Yoganand D 8 months ago
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#14
- % Done changed from 50 to 90
I supported testing the PLCIO hardware for 8 Channel AI, 16 channel DI and 16 channel DO.
Modified code to work in iterative to test one module after another.
- Completed 16 Channel DI testing.
- Completed 16 Channal DO testing.
- Completed 4 channel AI current Input Testing.
I have pushed the code, binary and the logs to my drive and have attached the link to the drive. Please find the attachment below:
OneDrive Link: https://elpisit-my.sharepoint.com/:f:/g/personal/yoganand_d_elpisitsolutions_com/IgDZ6LAJRkDpRLioY8XPKKeJAdcdd4GEgo4LTl1y1XoGzVw?e=IwdDUz
Updated by Thomas Joseph 8 months ago
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#15
Prakash M wrote in #note-2:
Updated CTB code:
CTB PCB TPP => https://elpisit-my.sharepoint.com/:x:/g/personal/satish_sl_elpisitsolutions_com/IQCV-vBSXkIkSKgORL-8Q2rfAYan2qXCAGP8Ne4ER6dgVCc?e=Cihm2o
mDAQ2-3 PCB TPP (QMS Folder)=> https://elpisit-my.sharepoint.com/:x:/g/personal/sudhakar_elpisit_onmicrosoft_com/IQAfWTLVuFDxQIaToFylURK3AddSY96Z3FbAdRSewOkYM8s?e=6beRMN
Updated by Yoganand D 8 months ago
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#16
- Status changed from In Progress to Resolved
- % Done changed from 90 to 100
Completed Testing for Analog Voltage Input readings.
I have attached the log file link below.