/*
 * Instance header file for ATSAME54P20A
 *
 * Copyright (c) 2024 Microchip Technology Inc. and its subsidiaries.
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *   http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 *
 */

/* file generated from device description file (ATDF) version 2023-03-17T09:50:08Z */
#ifndef _SAME54_TCC0_INSTANCE_
#define _SAME54_TCC0_INSTANCE_


/* ========== Instance Parameter definitions for TCC0 peripheral ========== */
#define TCC0_CC_NUM                              (6)        /* Number of Compare/Capture units */
#define TCC0_DITHERING                           (1)        /* Dithering feature implemented */
#define TCC0_DMAC_ID_MC0                         (23)       /* Indexes of DMA Match/Compare 0 trigger */
#define TCC0_DMAC_ID_MC1                         (24)       /* Indexes of DMA Match/Compare 1 trigger */
#define TCC0_DMAC_ID_MC2                         (25)       /* Indexes of DMA Match/Compare 2 trigger */
#define TCC0_DMAC_ID_MC3                         (26)       /* Indexes of DMA Match/Compare 3 trigger */
#define TCC0_DMAC_ID_MC4                         (27)       /* Indexes of DMA Match/Compare 4 trigger */
#define TCC0_DMAC_ID_MC5                         (28)       /* Indexes of DMA Match/Compare 5 trigger */
#define TCC0_DMAC_ID_OVF                         (22)       /* DMA overflow/underflow/retrigger trigger */
#define TCC0_DTI                                 (1)        /* Dead-Time-Insertion feature implemented */
#define TCC0_EXT                                 (31)       /* Coding of implemented extended features */
#define TCC0_GCLK_ID                             (25)       /* Index of Generic Clock */
#define TCC0_INSTANCE_ID                         (43)       /* Instance index for TCC0 */
#define TCC0_MASTER_SLAVE_MODE                   (1)        /* TCC type 0 : NA, 1 : Master, 2 : Slave */
#define TCC0_OTMX                                (1)        /* Output Matrix feature implemented */
#define TCC0_OW_NUM                              (8)        /* Number of Output Waveforms */
#define TCC0_PG                                  (1)        /* Pattern Generation feature implemented */
#define TCC0_SIZE                                (24)       
#define TCC0_SWAP                                (1)        /* DTI outputs swap feature implemented */

#endif /* _SAME54_TCC0_INSTANCE_ */
